Redundant arithmetic, algorithms and implementations
نویسندگان
چکیده
منابع مشابه
Redundant arithmetic, algorithms and implementations
Performance in many very-large-scale-integrated (VLSI) systems such as digital signal processing (DSP) chips, is predominantly determined by the speed of arithmetic modules like adders and multipliers. Even though redundant arithmetic algorithms produce signi"cant improvements in performance through the elimination of carry propagation, e$cient circuit implementations of these algorithms have b...
متن کاملVerifiable Implementations of Geometric Algorithms Using Finite Precision Arithmetic
Two methods are proposed for correct and verifiable geometric reasoning using finite precision arithmetic. The first method, data normalization, transforms the geometric structure into a configuration for which all finite precision calculations yield correct answers. The second method, called the hidden variable method, constructs configurations that belong to objects in an infinite precision d...
متن کاملDivision Algorithms and Implementations
Many algorithms have been developed for implementing division in hardware. These algorithms di er in many aspects, including quotient convergence rate, fundamental hardware primitives, and mathematical formulations. This paper presents a taxonomy of division algorithms which classi es the algorithms based upon their hardware implementations and impact on system design. Division algorithms can b...
متن کاملModular Arithmetic Using Low Order Redundant Bases
N-digit, radix-a bases are proposed for VLSI implementation of redundant arithmetic, mod m, where a m = ±1, a j m π ±1, for 0 < j < N and m is prime. These bases simplify arithmetic overflow and are well suited to redundant arithmetic. The representations provide competitive, multiplierless T-point Number Theoretic Transforms, mod m, where T | N or T | 2N.
متن کاملAdaptive Routing Algorithms and Implementations
Numerous adaptive routing algorithms which are common in traditional networking are being adapted for use in inter-processor communications. Although this method has numerous advantages, the overhead in terms of speed and node size has thus far been prohibitive in the approach’s success. Future system-on-chips as well as network-on-chips may implement a form of such a routing algorithm but not ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Integration
سال: 2000
ISSN: 0167-9260
DOI: 10.1016/s0167-9260(00)00015-8